OpTiMSoC stands for Open Tiled Manycore System-on-Chip. It is an open-source framework primarily written in Verilog which allows you to build your own manycore System-on-Chip by connecting tiles like processors and memories through a Network-on-Chip. The resulting system can then be simulated on a PC or synthesized for an FPGA (link).
The JTAG fault injector can be used to inject faults into main memory and registers of a running system. Compared to similar earlier approaches, this solution is able to achieve rapid fault injection using a low-cost microcontroller instead of a complex FPGA. Consequently, this JTAG injection software is much more flexible. It allows to restrict error injection to the execution of a set of predefined components, resulting in a more precise control of the injection (link).
To tackle the challenges of todays memory systems with respect to applications, performance, power, temperature, retention errors and di erent DRAM architectures a holistic exploration framework is needed. DRAMSys supports the following flow: DRAMSys consists of models that are reflecting the DRAM functionality, power (DRAMPower), temperature (IceWrapper) and retention time errors. With these models system designers are able to analyse the limiting parameters and issues. Therefore, the framework provides several analysis tools that assist the designer. With this valuable insights the designer is able to optimise the DRAM subsystem with respect to the controller architecture, power and thermal management as well as device selection and channel configuration for a specific application.