Prof. Lars Hedrich, Uni Frankfurt

Future embedded Systems on Chip (SoC) will have to meet several new requirements given by upcoming applications and hardware platforms: High dependability in the presence of unreliable hardware will be a key feature due to degrading process reliability and device aging caused by increasing integration density. Self-adaptation is necessary to adapt to a changing hardware platform and changing environment. The increasing importance of analog parts requires mixed-signal processing. Real-time requirements in combination with self-adaptation and unreliable hardware is another design challenge.

We propose a generalized core and task concept in combination with an artifcial hormone system (AHS) as a basic architecture to meet these requirements. Our MixedCoreSoC chip functionality is completely organized in form of cores, responsible for digital and analog processing. The notion of a "generalized core" represents a hardware component being able to execute one or more generalized tasks. The notion of a "generalized task" covers any task from classical software tasks up to hardware related tasks. This generalization allows a wide range of flexibility in failure handling and self-adaptation, since generalized tasks can migrate between generalized cores in a reactive way (e.g. due to failures) or a proactive way (e.g. on changing internal or external conditions).

To provide high dependability and avoid single points of failures, an artifcial hormone system (AHS) is proposed as a completely decentralized and self-organizing control mechanism. First, the AHS is responsible for assigning generalized tasks to generalized cores. Earlier research done using an AHS for assignment of software tasks to processing cores has shown real-time capabilities. Second, the AHS will be used to setup closed control feedback loops to e.g. control supply voltages, currents, frequencies, temperatures, etc. inside the cores. Due to its decentralized nature the AHS is more reliable than a classical closed control loop in the presence of faulty hardware. This allows proactive measures to modify vital core parameters thus avoiding or at least delaying failures of entire cores. The AHS itself can be realized in a mixed digital/analog way. For digital cores, artificial hormones can be represented by short messages while inside analog cores also analog voltages can represent hormone levels. Research on stability and time behavior of hormone based feedback loops is an important issue in the proposed project.

Failure models are another important basis of this project. They will be used to tailor the AHS to various failure scenarios in digital and analog system parts. Furthermore, failure models are useful to simulate failures in early stage simulations of the system as well as in later prototypic implementations. Thus, these models play an important role for evaluating and validating our concepts.

In the frst phase of the proposed project, the evaluation of our concepts will be simulation based. However, we envision several application scenarios for validating and demonstrating our approach. These are e.g. a mixed-signal automotive assistant control chip (brake assistance, steering assistance, lane assistance, etc.), a software de?ned radio chip and a control chip for palm to foot-sized model helicopters. In later project phases, we plan prototypic implementations first on an FPGA with analog extensions and/or using an ASIC. Unreliable hardware will be represented by simulated failures and failure injection based on failure models. Furthermore, real failures will be caused by stressing the ASIC chip with voltage, temperature, laser, microwaves or radiation.