Phase III Projects

Projects
Title Topic Project Leader

Software-based error handling using cooperation between compilers and operating systems / Flexible Error Handling for Embedded Real-Time Systems

Prof. Peter Marwedel, TU Dortmund

Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems Prof. Wolfgang Rosenstiel, Uni Tübingen
Providing Efficient Reliability in Critical Embedded Systems Prof. Mehdi Tahoori, KIT Karlsruhe
Online Test Strategies for Reliable Reconfigurable Architectures

Prof. Jörg Henkel, KIT Karlsruhe
Prof. Hans-Joachim Wunderlich, Uni Stuttgart

Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach

Prof. Ulf Schlichtmann, TU München

Generating and Executing Dependable Application Software on UnReliable Embedded Systems Dr. Muhammad Shafique, KIT Karlsruhe Prof. Jian-Jia Chen, TU Dortmund
Design of efficient, dependable VLSI architectures based on a cross-layer-reliability approach using wireless communication as application Prof. Norbert Wehn, TU Kaiserslautern
Dependability Aspects in Configurable Embedded Operating Systems

Dr. Rüdiger Kapitza, Uni Erlangen
Dr. Daniel Lohmann, Uni Erlangen
Prof. Olaf Spinczyk, TU Dortmund

Cross-layer Modeling and Mitigation of Aging Effects in Embedded Systems Prof. Mehdi Tahoori, KIT Karlsruhe
Communication Virtualization Enabling System Management for Dependable 3D MPSoCs

Prof. Jörg Henkel, KIT Karlsruhe
Prof. Andreas Herkersdorf, TU München

An Analyzable, Resilient, Embedded Real-Time Operating System Design

Prof. Rolf Ernst, TU Braunschweig
Prof. Hermann Härtig, TU Dresden



Collaboration Projects
Title Topic Project Leader
CAREER: Cognitive Power Management for Memory Dominated Mobile Devices

University of California-Irvine

Small: Adapting VLSI Test Principles for VLSI Trust

New York University

Variability-Aware Software for Efficient Computing with Nanoscale Devices

University of California-Los Angeles

Variability-Aware Software for Efficient Computing with Nanoscale Devices

University of California-San Diego

From High-level Synthesis to Layout: a Cross-layer Methodology for Large-scale Reliable IC Design

UT Austin

A Multi-Level Test Approach for Improving Reliability and Performance of Nanometer Technology Designs

University of Connecticut



Associated Projects
Title Topic Project Leader

CRAU: Compositional System Level Reliability Analysis in the Presence of Uncertainties

Prof. Michael Glaß, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)
Prof. Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)