In this talk, I will first introduce a task scheduling technique for streaming applications on MPSoC. The objective of the work is to minimize schedule length by totally removing inter-core communication overhead. By minimizing schedule length, the system performance can be improved by adopting a smaller period or exploring the slacks generated for energy reduction with DVS. To guarantee the schedulability of communication tasks, we perform the schedulability analysis and formulate the scheduling problem as an ILP (Integer Linear Programming) formulation. Our preliminary results show that the proposed technique can significantly reduce the schedule length and energy consumption compared with conventional schemes. In the second part of my talk, I will briefly introduce some of my recent work about reliability issues of NAND flash memory, especially for three-dimensional (3D) NAND flash memory.
Dr. Yi Wang is currently a postdoctoral research fellow in the Department of Computing at the Hong Kong Polytechnic University. He received a Ph.D. degree from the Department of Computing at the Hong Kong Polytechnic University in 2011. He received his B.Eng. and M.Eng. degrees in Electrical Engineering from Harbin Institute of Technology, in 2005 and 2008, respectively. His research interests include real-time systems and emerging memory technologies.