- Nikil Dutt, University of California at Irvine, USA
- Sandeep Gupta, University of Southern California, USA (Organizational Chair)
- Joerg Henkel, Karlsruhe Institute of Technology, Germany
- Sani Nassif, Radyalis, Austin, USA
- Hidetoshi Onodera, Kyoto University, Japan
- David Pan, University of Texas at Austin, USA
- Mehdi Tahoori, Karlsruhe Institute of Technology, Germany
Overview and Goals:
Improvements in chip manufacturing technology have propelled an astonishing growth of computing systems that are integrated into our daily lives. However, this trend is facing serious challenges, both at device and system levels. At the device level, as the minimum feature size continues to shrink, a host of vulnerabilities influence the robustness, reliability, and availability of embedded and critical systems. Some of these factors are caused by the stochastic nature of the nanoscale manufacturing process (e.g., process variability, sub-wavelength lithographic inaccuracies), while other factors appear because of high frequencies and nanoscale features (e.g., RLC noise, on-chip temperature variation, increased sensitivity to radiation and transistor aging). At the other end of the spectrum, these systems are seeing a tremendous increase in software content. Whereas traditional software design paradigms have assumed that the underlying hardware is fully predictable and error-free, there is now a critical need to build a software stack that is responsive to variations, and resilient against emerging vulnerabilities in the underlying hardware.
The interdisciplinary topic of cross layer resiliency spans various disciplines and requires collaboration and cooperation of various communities such as design automation, testing and design for testability, computer architecture, embedded systems and software, validation and verification, fabrication, device, circuits, and systems. Due to the interdisciplinary nature of this work, these topics have been partly covered in different venues of these communities and therefore we felt a strong need for a dedicated event that can bridge the gap among disciplines and bring together the experts from various involved communities to address the challenges of cross-layer resiliency. The first edition of this workshop, IWCR 2013, was held in Austin TX in July 2013, and attracted a diverse group of experts and started building a new community. (Please see a report from this workshop.) The objective of this year’s workshop is to continue to build this community of experts interested in multi-level resiliency challenges and solutions and possible paradigm shifts to consider reliability throughout the design flow, from devices to systems and applications.
IWCR 2014 will have invited talks by industry experts, short presentations from University researchers (including many whose research was funded by the leading funding agencies in Germany, Japan, UK, and the US), with significant time devoted to in-depth discussions in small breakout groups to identify key technical themes and opportunities for collaborations. IWCR has also invited program managers who supervise national funding programs in the area of resiliency at leading funding agencies. We plan to hold a discussion with a panel of program managers from various funding agencies. In this manner, IWCR 2014 will explore international collaborations and foster international cross-agency funding opportunities by building upon the experience from various national funded programs currently being executed in the general area of resiliency.
We also plan to consider a journal or magazine special issue on cross layer resiliency to cover the most important contributions of this workshop. We intend to seek co-sponsorship from IEEE CEDA and TTTC. Additionally, we plan to obtain support from other agencies and companies, such as National Science Foundation (NSF), German Research Foundation (DFG), Semiconductor Research Corporation (SRC), Japan Science and Technology Agency (JST), and possibly some of the companies active in this topic.